Online resource; title from PDF title page (EBSCO, viewed September 18, 2018)

Intro; Preface; Contents; Contributors; 1 Basic Knowledge to Understand FPGAs; 1.1 Logic Circuits; 1.1.1 Logic Algebra; 1.1.2 Logic Equation; 1.1.3 Truth Table; 1.1.4 Combinational Circuits; 1.1.5 Sequential Circuits; 1.2 Synchronous Logic Design; 1.2.1 Flip-Flop; 1.2.2 Setup Time and Hold Time; 1.2.3 Timing Analysis; 1.2.4 Single-Clock Synchronous Circuits; 1.3 Position and History of FPGAs; 1.3.1 The Position of FPGA; References; 2 What Is an FPGA?; 2.1 Components of an FPGA; 2.2 Programming Technology; 2.2.1 Flash Memory; 2.3 Antifuse Technology; 2.3.1 Static Memory Technology

2.3.2 Summary of Programming Technology2.4 Logic Circuit Representation of FPGA; 2.4.1 Circuit Implementation on FPGA; 2.4.2 Logical Expression by Product Term; 2.4.3 Logical Expression by Lookup Table; 2.4.4 Structure of Lookup Table; 2.4.5 Logical Expression by Other Methods; References; 3 FPGA Structure; 3.1 Logic Block; 3.1.1 Performance Trade-Off of Lookup Tables; 3.1.2 Dedicated Carry Logic; 3.2 Logic Cluster; 3.3 Adaptive LUT; 3.3.1 Altera Stratix II; 3.3.2 Xilinx Virtex 5; 3.4 Routing Part; 3.4.1 Global Routing Architecture; 3.4.2 Detailed Routing Architecture

3.4.3 Wire Segment Length3.4.4 Structure of Routing Switch; 3.5 Switch Block; 3.5.1 Switch Block Topology; 3.5.2 Multiplexer Structure; 3.6 Connection Block; 3.7 I/O Block; 3.8 DSP Block; 3.8.1 Example Structure of a DSP Block; 3.8.2 Arithmetic Granularity; 3.8.3 Usage of DSP Blocks; 3.9 Hard Macros; 3.9.1 Interface Circuits as Hard Macros; 3.9.2 Hard-Core Processors; 3.10 Embedded Memory; 3.10.1 Memory Blocks as Hard Macros; 3.10.2 Memory Using LUTs in Logic Blocks; 3.10.3 Usage of Embedded Memory; 3.11 Configuration Chain; 3.11.1 Memory Technologies for Configuration; 3.11.2 JTAG Interface

3.12 PLL and DLL3.12.1 Basic Structure and Operating Principle of PLL; 3.12.2 Typical PLL Block; 3.12.3 Flexibility and Restriction of PLL Blocks; 3.12.4 Lock Output; 3.12.5 DLL; References; 4 Design Flow and Design Tools; 4.1 Design Flow; 4.2 Design Flow by HDL; 4.2.1 Registration of Project; 4.2.2 Logic Synthesis and Technology Mapping; 4.2.3 RTL Simulation; 4.2.4 Place and Route; 4.2.5 Programming; 4.2.6 Verification and Debugging on Actual Device; 4.2.7 Optimization; 4.3 HLS Design; 4.3.1 Behavioral Description; 4.3.2 Behavior Level Simulation; 4.3.3 Behavioral Synthesis

4.3.4 Evaluation and Optimization4.3.5 Connection with RTL; 4.4 IP-Based Design; 4.4.1 IP and Its Generator; 4.4.2 Use of IP and Its Integration Tool; 4.4.3 Support Tool for Building IP; 4.5 Design with Processor; 4.5.1 Hard-Core Processor and Soft-Core Processor; 4.5.2 Building Processor System; 4.5.3 Software Development Environment; 4.5.4 Integration and Operation of Software and Hardware; References; 5 Design Methodology; 5.1 FPGA Design Flow; 5.2 Technology Mapping; 5.3 Clustering; 5.4 Place and Route; 5.5 Low Power Design Tools; 5.5.1 Emap: Low Power Consumption Mapping Tool

This comprehensive textbook on the field programmable gate array (FPGA) covers its history, fundamental knowledge, architectures, device technologies, computer-aided design technologies, design tools, examples of application, and future trends. Programmable logic devices represented by FPGAs have been rapidly developed in recent years and have become key electronic devices used in most IT products. This book provides both complete introductions suitable for students and beginners, and high-level techniques useful for engineers and researchers in this field. Differently developed from usual integrated circuits, the FPGA has unique structures, design methodologies, and application techniques. Allowing programming by users, the device can dramatically reduce the rising cost of development in advanced semiconductor chips. The FPGA is now driving the most advanced semiconductor processes and is an all-in-one platform combining memory, CPUs, and various peripheral interfaces. This book introduces the FPGA from various aspects for readers of different levels. Novice learners can acquire a fundamental knowledge of the FPGA, including its history, from Chapter 1; the first half of Chapter 2; and Chapter 4. Professionals who are already familiar with the device will gain a deeper understanding of the structures and design methodologies from Chapters 3 and 5. Chapters 6–8 also provide advanced techniques and cutting-edge applications and trends useful for professionals. Although the first parts are mainly suitable for students, the advanced sections of the book will be valuable for professionals in acquiring an in-depth understanding of the FPGA to maximize the performance of the device.

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